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Parthasarathy, Magesh Kannan
- Implementation of High Gain Cascode Amplifiers for High Frequency Applications
Authors
1 VLSI Division in VIT University, Vellore, IN
Source
Programmable Device Circuits and Systems, Vol 2, No 11 (2010), Pagination: 180-186Abstract
This paper combines the effect of high gain and high bandwidth of Cascode amplifiers. The proposed technique works with very low supply voltage. In this paper body driven and gate driven techniques are employed to Cascode amplifiers to enhance the gain of amplifier without degrading the bandwidth of amplifier to a very low value. Using the proposed architecture, four different sub-1V single stage amplifiers have been designed and simulated in 0.18µm CMOS technology that guarantees the suitability of the circuit in very low supply voltages.Keywords
Cascode, Current Mirror, High Frequency, Low Supply Voltage, Wideband.- Implementation of Active Filters for Speech Processing using Switched-Capacitors
Authors
1 VLSI Design in VIT University, Vellore, IN
Source
Programmable Device Circuits and Systems, Vol 2, No 11 (2010), Pagination: 194-201Abstract
The main objective of this paper is to design and implement a Chebyshev band pass filter using a switched-capacitor realization. The transfer function is to be realized as the product of a second-order high-pass filter in cascade with second-order low-pass filter. Switched capacitor filters are normally used in an integrated circuit product environment as resistors, are expensive and not easily controlled. Switched capacitors may be used to simulate resistors to an acceptable degree of accuracy using capacitors and MOSFETs, and are generally less costly than resistors. The switching functions of the MOSFETs produce a discrete response rather than a continuous response from the filter. Therefore, Z Transforms are employed rather than S Transforms, and just as in digital filters, aliasing effects occur. Any Z Transform approximation to a continuous function may be used to design a switched capacitor filter. The design and implementation is done using Mentor Graphics EDA tool in TSMC 180nm technology.